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• Crystal Oscillator Terms and Definition
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Nominal frequency:

The center ornominal frequency of a crystal oscillator.

Frequency stability:

Deviation fromthe nominal output frequency including the frequency deviation due to manufacturingprocess, temperature, power source variation and load variation. The mostcommon stabilities are ±25, ±50 and ±00ppm.

Operating temperature range:

Temperature rangewithin which output frequency stability and other electrical, Environmentalcharacteristics meet the specifications. Military: -55℃ to+125℃; Industrial:-40℃ to+85℃; commercial: 0℃ to+70℃.

Frequency aging:

The relativefrequency change over a certain period of time. The rate of change ofFrequencyis normally exponential in character. Typically, aging is ±5 ppm maximum over 1year.

Storage temperature:

The temperaturerange within which the unit is safely stored without damaging orChanging theperformance of the unit.

Oscillator output:

The output of ahybrid crystal oscillator is a highly stable reference signal and it canformsquare wave of HCMOS or TTL level, depending on the technology of theactive devices used in the circuit.Output logic: The vast majority of systemsrequire a crystal oscillator output that is TTL compatible, CMOSCompatible, ECLcompatible or some combinations of logic families such as TTL/HCMOS compatible.

TTL/HCMOS compatible:

The oscillator isdesigned with ACMOS logic with driving capability of TTL andHCMOS loads whilemaintaining minimum logic HIGH of the HCMOS.

Logic levels:

Logic levels maybe positive or negative. Positive logic is assumed when logic 1 level ismorePositive than logic 0 level, while negative logic is assumed when the logic1 level is more negative than logic 0 Level.

Output HIGH voltage (VOH):

The minimumvoltage at output logic 1 state of the oscillator under properLoading.

Output LOW voltage (VOL):

The maximumvoltage at output logic 1 state of the oscillator under properLoading.

Fan out (Loads):

The measure ofthe driving capability of an oscillator, expressed as the number of inputsthatcan be driven by a single output. It can be represented by an equivalentload capacitance specified at pF inCMOS logic or the number of gates in TTlload circuit consisting of diode, load resistors, and a capacitor. If Thisvalue exceeds the maximum rated load of the oscillator, signal degradation canoccur.

Startup time:

The startup timeis specified as the that an oscillator take to reach its specified RF outputamplitude. The startup time is determined by the closed loop time constant andthe loading condition of its circuit.

Rise & Fall time (Tr & Tf):

The rise time Trof an oscillator is defined as the transition time of the output waveform fromlow stage (logic 0 ) to high stage (logic 1 ). The fall time Tf of anoscillator is defined as the transition time of the output waveform from highstage (logic 1 ) to low stage (logic 0 ). The transition times measured at thespecified level such as between 90% and 10% of the falling edge of theswitching waveform for HCMOS device. Increasing the load will increase the riseand fall times of the device.

Symmetry or Duty cycle:

The measure ofoutput waveform uniformity of the shape of the waveform, which is made up oflogic 1 and logic 0 cycle times. It is defined as the ratio of the time periodsof the logic 1 level (TH) to the time periods of one complete cycle (T),measured at 1.4 volts for TTL logic and 50% of the peak-to-peak voltage forCMOS. Sym=TH/T X 100%.

Tri-state enable:

By applying acommand input signal to the oscillators, the output of the clock oscillators isturned off or disabled. When this feature is activated, the oscillators assumea high impedance state. This feature allows the oscillator to be isolated fromthe circuit upon application of a command signal.

Input current ad supply voltage:

Input current isthe amount of current deain by an oscillator in its operating condition.Different logic oscillators require different input current. Supply voltage isthe voltage necessary to operate the oscillator. It is typically 5 V or 3.3 V.

Phase Noise:

Phase noise is asmall fraction of undesirable frequency near the output frequency, and isusually Expressed as the single side band (SSB) power density density in a 1 Hzbandwidth at a specified oddest frequency from The carrier. It is measure indBc/Hz.

Jitter:

Measure of themodulation in phase or frequency of the oscillator output.

Standby function:

A function builtin the IC that temporary turns off the oscillator to save power. Logic 0 willenable stand by mode. The disable current at stand by mode varies from fewmicro ampered to tens of micro amperes (0.005 mA typical). Because oscillationis halted, there is a maximum of 10ms (same amount as the start-up time) beforeoutput stabilizes.

Harmonic distortion: